The memory cells in MRAM devices are programmed by the magnetic field created from a current carrying conductor. Typically two orthogonal conductors, one formed underneath the magnetic memory bit, hereinafter referred to as the digit line, and one formed on top of the magnetic memory bit, hereinafter referred to as the bit line, are arranged in a cross point matrix to provide magnetic fields for bit programming. Generally, advanced semiconductor processes use copper metal interconnects. The preferred method of forming the copper interconnects is by a damascene or inlaid process. During the process of forming the device, a flux concentrating layer has previously been utilized. The structure is generally formed by first patterning and etching a trench in a dielectric layer, followed by the deposition of a first barrier layer, a flux concentrating layer, a second barrier layer, a copper (Cu) seed layer, and finally a plated copper (Cu) layer. The barrier films are necessary for several reasons. The first barrier layer acts as a diffusion barrier to fast diffusing elements like copper (Cu), and nickel iron (NiFe) alloys. This barrier is typically formed of materials such as tantalum (Ta), tantalum nitride (TaN), tantalum silicon nitride (Ta/Si/N), titanium (Ti), titanium nitride (TiN), or other materials that act to inhibit grain boundary diffusion. This barrier film must also be conductive.
The flux concentrating layer must be of a high permeability and magnetically soft (low coercivity). Magnetostriction must also be low. The nickel iron (NiFe) alloys work well for this flux concentrating layer. The second barrier film acts as a diffusion barrier between the nickel iron (NiFe) alloy and the copper (Cu). Nickel iron (NiFe) alloys and copper (Cu) intermix readily, creating a magnetic dead layer in the high permeability material. This dead layer reduces the effective thickness of the high permeability material reducing its effectiveness. This barrier material has to be conductive and should not have a higher selectivity to polishing chemistries used to remove the copper (Cu) and the nickel iron (NiFe) alloy. Tantalum (Ta) based barriers have such selectivity and thus are not ideal choices for the second barrier because of the increased processing complexity. A second barrier material of cobalt (Co) or cobalt iron (CoFe) is a better material as it acts as a barrier between the nickel iron NiFe) and the copper (Cu) and has similar polish characteristics as nickel iron (NiFe) and copper (Cu). The use of cobalt (Co) or cobalt iron (CoFe) as a second barrier layer also adds to the permeability of the flux concentrating layer, but needs to be thinner than the nickel iron (NiFe) because of the higher coercivity. Further information with respect to a magnetic device including a flux concentrating layer can be found in U.S. Pat. No. 5,861,328, entitled "METHOD OF FABRICATING GMR DEVICES", issued Jan. 19, 1999, assigned to the same assignee and incorporated herein by this reference.
One problem in the fabrication of MRAM devices such as those previously described, and more particularly memory cells in general, is the intermixing at elevated temperatures of the cladding layer, typically nickel iron (NiFe) and the copper (Cu) conductor. In addition, advanced CMOS processes use single or dual inlaid copper (Cu) metal interconnects. To overcome these problems, a technique for cladding the copper (Cu) lines formed underneath and on top of the magnetic memory bit that utilizes standard equipment set for inlaid copper (Cu) processing is needed.
Incorporation of a high permeability cladding material on the outside faces of each conductor will focus the magnetic flux toward the bit. The cladding layer using flux concentrating materials will reduce the program current by a factor of approximately two (2), as compared to non-cladded lines. In addition, the cladding layer will provide shielding from stray external fields.
Accordingly it would be highly desirable to provide an improved material stack for adding a flux concentrating layer to copper (Cu) damascene lines. Disclosed is a method for forming cladded inlaid copper (Cu) damascene lines which utilizes standard equipment and processes for the formation of the cladded copper (Cu) damascene line.
Therefore, it is a purpose of the present invention to provide a new and improved method of fabricating magnetoresistive random access memories (MRAMs) containing flux concentrating materials.
It is another purpose of the present invention to provide a new and improved method of fabricating magnetoresistive random access memories (MRAMs) containing flux concentrating materials which includes a technique for cladding the bit line on top of the magnetic memory bit as well as the fabrication of a digit line formed underneath the magnetic memory bit, using standard inlaid processing equipment.
It is a further purpose of the present invention to provide a new and improved method of fabricating magnetoresistive random access memories containing flux concentrating materials with improved structures for forming the cladded lines with barrier layers that focus the magnetic flux upward toward the bit for digit lines formed underneath the magnetic bit and downward toward the bit for bit lines formed on top of the magnetic bit.